1. Field of the Invention
The present invention generally relates to digital data processing systems, and more particularly relates to emulation of a first device through the use of a second and different type of device.
2. Description of the Prior Art
It is well known in the prior art to design and build general purpose instruction processors having a predefined software architecture and instruction set. It is also known to design and build instruction processors having predefined software architectures and instruction sets which are more specialized in nature. Such specialized designs are typically directed toward optimization of a particular task or a closely related group of tasks.
One of the tasks to which a specialized design is particularly pertinent is in the field of real time communications processing. Whereas this application does not require complex arithmetic and mathematical calculations, for example, it does require rapid switching of data and control. It also relies upon rapid transfer of data from one location to another. As a result, a communications instruction processor typically has extensive switching, timing, and data transfer instruction, with only modest attention to complex mathematics, such as floating point arithmetic. In a typical implementation, this means that the communications processor would have a modest set of general purpose instructions (e.g., add, shift, compare, etc.) along with a number of specialized instructions for queue manipulation, segment handling, buffer allocation, etc.
Perhaps the best example of a communications instruction processor having an especially effective design is the Distributed Communications Processor (DCP) available from Unisys Corporation. The DCP instruction processor is found in many systems in use today. The unique software architecture which provides the efficiencies for this specialized application provides difficulty in upgrading to newer and faster hardware.
It is normal to expect that newer and faster instruction processors are continuously being designed and built. Yet for economic reasons of scale, these designs typically have a more generalized software architecture to promote a larger volume of applications over which to amortize the non-recurring development costs. Thus, to benefit from these newer instruction processors, the existing DCP communications software would need to be reprogrammed to operate within the more generalized software architecture of the new instruction processor.
Such reprogramming has two major disadvantages. First, the cost of the reprogramming process may be substantial and occupy a rather extensive development schedule. Second, programming of the communications software to operate within a more generalized architecture does away with the efficiencies to be realized by the more specialized communications architecture.
The typical answer to this dilemma is emulation. Emulation is the process whereby the host machine (in this case a new instruction processor design having a somewhat generalized software architecture) is programmed to provide the more specialized software architecture of the target machine (in this case the DCP). Using this technique, the existing DCP communications software can run on a newer instruction processor with an apparently incompatible software architecture. U.S. Pat. No. 5,794,011, issued to Paul et al., discusses the technique of emulation.
Thus, emulation most easily resolves the first of the problems by eliminating the expense and long development schedule involved in reprogramming. However, the question of runtime efficiencies is always present when emulation techniques are employed. Unless the specific emulation system is optimized for efficiency, the new and faster host instruction processor may actually executed the desired software more slowly than the older specialized target processor. The easiest way to provide efficient emulation is to provide the emulation logic in microcode. As such, the host machine becomes the target machine via the microprogramming. Unfortunately, this directly changes the host environment to look like the target environment. As a result, the host machine loses its character and can no longer execute code specifically designed for its native environment.
In order to provide an emulation wherein the host machine presents both the target environment and its native environment, it is common for prior art emulation techniques to perform a runtime software comparison within the host machine to locate those host machine instructions required to implement a particular target instruction. For emulation of the DCP, this would require an average of about 150 comparisons per specialized target instruction to be emulated. This would render a hopelessly inefficient emulation.
Of particular difficulty is the emulation of a multi-processor target environment. This difficulty is exacerbated when utilizing a single processor host.